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Applying Dual-Core Lockstep in Embedded Processors to ...

Applying Dual-Core Lockstep in Embedded Processors to ...

posed DCLS is implemented in a hard-core ARM Cortex-A9 embedded into a Zynq-7000 APSoC. The approach ef?ciency was validated not only on applications running in bare-metal but also on top of FreeRTOS systems. Heavy ions experiments and fault injection emulation were performed to analyze the system susceptibility to bit-?ips. The obtained

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Applying Dual-Core Lockstep in Embedded Processors to ...

Applying Dual-Core Lockstep in Embedded Processors to ...

problem this work presents a Dual-Core LockStep (DCLS) as a fault tolerance technique to mitigate radiation-induced faults affecting processors embedded into APSoCs. Lock-step is a method based on redundancy used to detect and correct soft errors. The pro-posed DCLS is implemented in a hard-core ARM Cortex-A9 embedded into a Zynq-7000 APSoC ...

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NXP Semiconductors Data Sheet: Technical Data

NXP Semiconductors Data Sheet: Technical Data

• Three dual issue, 32-bit CPU core complexes (e200z7), two of which run in lockstep • Power Architecture embedded specification compliance • Instruction set enhancement allowing variable length encoding (VLE), optional encoding of mixed 16-bit and 32-bit instructions, for code size footprint reduction • On the two computational cores: Signal processing extension (SPE1.1) instruction ...

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Reach Target ISO26262 ASIL with a Unified Fault ...

Reach Target ISO26262 ASIL with a Unified Fault ...

–Can be prevented by applying process or design measures (ex: design review) ... Dual-Core Lockstep Custom Safety Mechanisms Create FMEA +SM (DC) IP-> SoC Safety Analysis Design Data Create FMEDA Technology Failure Rate Fault Coverage Measurement: - Formal Fault Reduction - Fault Simulation 'SGV' columns: S=SPF, M=MPF, N=Safe [Drop-down]: 'DC gets MPF' columns: Y=Yes, N=No [Drop-down ...

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Hybrid FPGA/Multi-core CPUs for Industrial Applications

FPGA fabric with a dual core ARM Cortex A9 general purpose processor. Interconnections between FPGA fabric and processing system is implemented in both cases using the AMBA AXI protocol [1]. However there are some major differences between both systems. On the one hand, the Xilinx solution (Zynq-7000) has a processor-centric approach. This ...

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MODULAR REDUNDANCY FOR ROBUST SOFT IP-CORES

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with the soft IP-core's developer the core can be customized to varying degrees to fit the varying needs to the system, which can include access to the core's source code. 2.3 TRIPLE MODULAR REDUNDANCY Triple modular redundancy, TMR, is a simple method for trying to improve the reliability of a system built out of low reliability components ...

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Efficient Application of Multi-Core Processors as ...

Efficient Application of Multi-Core Processors as ...

applying range checks to level 1 values. In case of detected faults, level 2 is either able to apply referring reactions by itself or it initiates a reaction carried out by level 1. The third ...

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Getting existing projects through IEC61508

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Thus the possibility of applying IEC61508 retrospectively does exist, but in some cases doing so is prohibitively expensive and may actually cost more than re-engineering the product again from scratch. This is especially true if the existing project is very poorly documented, has no proper unit tests, or has to be at a high Safety Integrity Level (SIL) i.e. SIL3. However, for most ...

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SEU and SET-tolerant ARM Cortex-R4 CPU for Space and ...

Cortex-R4 can also be used in a dual-core lock step (DCLS) configuration where a second redundant CPU can run in lock step with the first one. Both cores will share inputs

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Applying the first static-join on one group and the second on another group. 2. Applying the joins strictly in the above order, such as applying the first static-join with a valid source-list ACL and second static-join on a different group with undefined source-list.

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Notes on the Multiple Facets of Immigration ... - core.ac.uk

NOTES ON THE MULTIPLE FACETS OF IMMIGRATION FEDERALISM Rick Su* Immigration is a national issue and a federal responsibility. To describe it

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